In early 2004 a plan was hatched to develop a Global Navigation Satellite System (GNSS) receiver based around Field Programmable Gate Array (FPGA) technology as a platform to support research in this fi eld. A joint project was set up between the School of Surveying and Spatial Information Systems (SISS) at the University of New South Wales and the National ICT Australia (NICTA), and soon after a small team was established. The team consisted of Kevin Parkinson, a post-graduate student at SISS with experience in FPGA and circuit board design, Frank Engel, a researcher with NICTA with software, Real Time Operating Systems (RTOS) and VHDL design knowledge and me, Peter Mumford from the SISS GNSS research group. At the end of the project we hoped to have an L1 GPS receiver running on a custom circuit board with the baseband processor and navigation solution processor running on an FPGA chip. The project is coming to an end now, and in this article, I will describe our design path, what has been achieved to date and then some potential research areas, but fi rst a little background.